1. Field of the Invention
The present invention generally relates to high-frequency switch devices capable of switching a high-frequency signal, and more particularly, to a high-frequency switch device using a compound semiconductor such as GaAs.
2. Description of the Related Art
A high-frequency switch device that handles high frequencies (RF) over hundreds of MHz is required to have an ability of switching high-frequency signals with low insertion loss. A high-frequency switch device using the compound semiconductor is known as a switch device that meets the above requirement.
FIG. 1 is a circuit diagram of this type of high-frequency switch device, and FIG. 2 is a schematic plan view of the switch device. The circuit shown in FIG. 1 is known as an SPDT (Single Pole Dual Throw) switch. The switch device includes four field effect transistors FET11, FET12, FET21 and FET22. A control voltage Vcon1 is applied to the gates of FET11 and FET22, a control voltage Vcon2 is applied to the gates of FET12 and FET21. FET11 and FET21 are connected in series between signal terminals T1 and T2. A signal terminal PC is connected to an intermediate node via which FET11 and FET21 are connected in series. The signal terminal PC corresponds to a movable contact of the switch, while the signal terminals T1 and T2 correspond to stationary contacts. The signal terminal T1 is connected to ground GND1 via FET12, and the signal terminal T2 is connected to ground GND2 via FET22.
When FET11 and FET22 are ON, FET21 and FET12 are OFF. Similarly, when FET21 and FET12 are ON, FET11 and FET22 are OFF. The controls voltages Vcon1 and Vcon2 are used to realize the above-mentioned ON/OFF control. When FET11 is ON, the signal terminal PC is connected to the signal terminal T1, and the signal terminal PC is isolated from the signal terminal T2. At this time, the FET22 is ON and sets the signal terminal T2 at the ground potential.
Referring to FIG. 2, the high-frequency switch device of FIG. 1 is formed on a GaAs substrate (GaAs chip) 10. Squares on the GaAs chip 10 denote pads. Symbols given to the pads correspond to those shown in FIG. 1. The circuit of FIG. 1 is schematically illustrated with a symbol of switch having one movable contact and two stationary contacts.
FIG. 3A shows a circuit using two high-frequency switch devices, each having the configuration shown in FIG. 1. Each of switches SW1 and SW2 is a high-frequency switch device configured as shown in FIGS. 1 and 2. Filters FLT1 and FLT2 are band-pass filters that have different center frequencies. The switches SW1 and SW2 cooperate with each other to select either the filter FLT1 or FLT2. The switches SW1 and SW2 are formed by individual chips and are therefore spaced apart from each other. Thus, as shown in FIG. 3B, the electromagnetic coupling between the switches SW1 and SW2 (the electric field lines indicated by an arrow) is weak, so that a sufficient isolation level more than 50 dB can be secured. The above isolation (attenuation) is much lower than 40 dB that is usually required as an attenuation level in the suppressed frequency ranges of the filters FLT1 and FLT2. Thus, the filters FLT1 and FLT2 perfectly exhibit the original performance.
However, a problem occurs in such a case where the two switches SW1 and SW2 are integrated on a single GaAs chip 12 having 1–2 mm□, as shown in FIG. 4A. In this case, the pads and the FETs of the switches SW1 and SW2 are adjacent via a gap or spacing of hundreds of μm, and are spatially close to each other. Thus, only an isolation level as small as about 30 dB can be secured between the switches SW1 and SW2, as shown in FIG. 4B. The isolation level of 30 dB is worse than the attenuation level of 40 dB available in the suppressed frequency ranges of the filters FLT1 and FLT2. That is, the filters FLT1 and FLT2 have an attenuation level of 40 dB in the suppressed frequency ranges, nevertheless, the whole device shown in FIG. 4A has only an attenuation of 30 dB in the suppressed frequency ranges. This means that there is difficulty in arrangement of multiple switches on the single chip. In other words, there is difficulty in miniaturization of the semiconductor chip.